1. Field of the Invention
The present invention relates to semiconductor devices, and more particularly to a lateral power MOSFET having radiation structure and isolation effect.
2. Description of Related Art
The development of single chip process for integrating power switches with control circuitries is a major trend in the field of power IC development. The LDMOS (lateral double diffusion MOS) process in particular is currently being applied to manufacture monolithic ICs. The LDMOS process involves performing planar diffusion on the surface of a semiconductor substrate to form a main current path oriented in the lateral direction.
In recent developments, many high-voltage LDMOS transistors have been proposed. However, the drawback of these prior arts is that aforementioned LDMOS transistors have higher on-resistance. Therefore, high voltage and low on-resistance LDMOS transistors are proposed. Although a high voltage and low on-resistance LDMOS transistor can be manufactured, the complexity of the production processes increases the production cost and/or reduces the production yield. Another disadvantage of these proposed LDMOS transistors is their non-isolated source structure. A non-isolated transistor current could flow around the substrate. This may generate noise interference in the control circuit. Besides, the current of the LDMOS transistor can generate a ground bounce to disturb the control signals. And it is needed to provide a kind of isolation structure between elements to prevent disturbance in between each other. In order to solve these problems, the present invention proposes a LDMOS structure to realize a high breakdown voltage, low on-resistance and isolated transistor for the monolithic integration.